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Monday, July 17, 2006

Intel Xeon 7100 16MB L3 model launch

According to the latest roadmap for
Intel server platform, new multi-processor Xeon 7100 family (Tulsa)
plans to launch on Aug 27, replacing Xeon 7000 (Paxville MP) to against
Opteron 8 family.



Xeon 7100 is an x86 type containing the largest number of transistor in
total of 1228M. Even with 65nm process, its size is as larger as 435 mm
sq., approximately 9 times larger then Yonah. Tulsa is a dual-core with
build-in 16MB L3 cache. With Smart Cache enabled, each core spares
independent L1 and L2 cache, and share L3 cache through Caching
Front-Side Bus Controller. Although it’s similar in the cache design to
Core architecture, Tulsa also keeps high Pipeline Stage similar to
Netburst and support Hyper-Threading.

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